A new 130nm F.E readout chip for microstrip detectors

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dc.creatorSavoy-Navarro, Aurore
dc.creatorGenat, Jean F.
dc.creatorPham, Th. Hung
dc.creatorSefri, Rachid.
dc.creatorComerma, Albert
dc.creatorDieguez, Angel
dc.date2009-03-26
dc.date.accessioned2026-07-07T12:57:10Z
dc.date.available2026-07-07T12:57:10Z
dc.descriptionIn the context of the Silicon tracking for a Linear Collider (SiLC) R&D collaboration, a highly compact mixed-signal chip has been designed in 130nm CMOS technology intended to read Silicon strip detectors for the experiments at the future International Linear Collider. The chip includes eighty eight channels of a full analog signal processing chain and analog to digital conversion with the corresponding digital controls and readout channels. The chip is 5x10mm2 where the analog implementation represents 4/5 of the total Silicon area.
dc.description3 pages, 4 figures, LCWS08 workshop
dc.identifierhttps://arxiv.org/abs/0903.4673
dc.identifierhttp://arxiv.org/abs/0903.4673
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/224836
dc.subjectInstrumentation and Detectors
dc.subjectHigh Energy Physics - Experiment
dc.titleA new 130nm F.E readout chip for microstrip detectors
dc.typetext

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