Development of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments

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dc.creatorHiguchi, T.
dc.creatorFujii, H.
dc.creatorIkeno, M.
dc.creatorIgarashi, Y.
dc.creatorInoue, E.
dc.creatorItoh, R.
dc.creatorKodama, H.
dc.creatorMurakami, T.
dc.creatorNakao, M.
dc.creatorNakayoshi, K.
dc.creatorSaitoh, M.
dc.creatorShimazaki, S.
dc.creatorSuzuki, S. Y.
dc.creatorTanaka, M.
dc.creatorTauchi, K.
dc.creatorYamauchi, M.
dc.creatorYasu, Y.
dc.creatorVarner, G.
dc.creatorNagasaka, Y.
dc.creatorKatayama, T.
dc.creatorWatanabe, K.
dc.creatorIshizuka, M.
dc.creatorOnozawa, S.
dc.creatorLi, C. J.
dc.date2003-05-28
dc.date.accessioned2026-07-07T03:35:51Z
dc.date.available2026-07-07T03:35:51Z
dc.descriptionData logging at an upgraded KEKB accelerator or the J-PARC facility, currently under commission, requires a high density data acquisition platform with integrated data reduction CPUs. To follow market trends, we have developed a DAQ platform based on the PCI bus, a choice which permits a fast DAQ and a long expected lifetime of the system. The platform is a 9U-VME motherboard consisting of four slots for signal digitization modules, readout FIFOs for data buffering, and three PMC slots, on one of which resides a data reduction CPU. We have performed long term and thermal stability tests. The readout speed on the platform has been measured up to 125 MB/s in DMA mode.
dc.descriptionTalk from the 2003 Computing in High Energy and Nuclear Physics (CHEP03), La Jolla, Ca, USA, March 2003, 6 pages, LaTex, 7 eps figures. PSN TUGT004
dc.identifierhttps://arxiv.org/abs/hep-ex/0305088
dc.identifierhttp://arxiv.org/abs/hep-ex/0305088
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/37520
dc.subjectHigh Energy Physics - Experiment
dc.titleDevelopment of a PCI Based Data Acquisition Platform for High Intensity Accelerator Experiments
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