Fault-Tolerant Computing With Biased-Noise Superconducting Qubits

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dc.creatorAliferis, Panos
dc.creatorBrito, Frederico
dc.creatorDiVincenzo, David P.
dc.creatorPreskill, John
dc.creatorSteffen, Matthias
dc.creatorTerhal, Barbara M.
dc.date2008-06-02
dc.date2009-01-30
dc.date.accessioned2026-07-07T12:35:20Z
dc.date.available2026-07-07T12:35:20Z
dc.descriptionWe present a universal scheme of pulsed operations for the IBM oscillator-stabilized flux qubit comprising the CPHASE gate, single-qubit preparations and measurements. Based on numerical simulations, we argue that the error rates for these operations can be as low as about .5% and that noise is highly biased, with phase errors being stronger than all other types of errors by a factor of nearly 10^3. In contrast, the design of a CNOT gate for this system with an error rate of less than about 1.2% seems extremely challenging. We propose a special encoding which exploits the noise bias allowing us to implement a logical CNOT gate where phase errors and all other types of errors have nearly balanced rates of about .4%. Our results illustrate how the design of an encoding scheme can be adjusted and optimized according to the available physical operations and the particular noise characteristics of experimental devices.
dc.description15 pages, 7 figures
dc.identifierhttps://arxiv.org/abs/0806.0383
dc.identifierhttp://arxiv.org/abs/0806.0383
dc.identifierNew J. Phys. 11 (2009) 013061
dc.identifierdoi:10.1088/1367-2630/11/1/013061
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/217737
dc.subjectQuantum Physics
dc.subjectSuperconductivity
dc.titleFault-Tolerant Computing With Biased-Noise Superconducting Qubits
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