Nonvolatile SRAM architecture using MOSFET-based spin-transistors

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dc.creatorShuto, Yusuke
dc.creatorYamamoto, Shuu'ichirou
dc.creatorSugahara, Satoshi
dc.date2009-01-20
dc.date.accessioned2026-07-07T12:32:06Z
dc.date.available2026-07-07T12:32:06Z
dc.descriptionThe authors proposed and computationally analyzed nonvolatile static random access memory (NV-SRAM) architecture using metal-oxide-semiconductor field-effect transistor (MOSFET) type of spin-transistors referred to as pseudo-spin-MOSFET (PS-MOSFET). PS-MOSFET is a new circuit approach to reproduce the functions of spin-transistors, based on recently progressed magnetoresistive random access memory (MRAM) technology. The proposed NV-SRAM cell can be simply configured by connecting two PS-MOSFETs to the storage nodes of a standard SRAM cell. The logic information of the storage nodes can be electrically stored into the magnetic tunnel junctions (MTJs) of the PS-MOSFETs by current-induced magnetization switching (CIMS), and the stored information is automatically restored when the inverter loop circuit wakes up. In addition, the proposed NV-SRAM cell has no influence on the performance of normal SRAM operations. Low power dissipation and high degree of freedom of MTJ design are also remarkable features for NV-SRAM using PS-MOSFETs.
dc.description12 pages, 4 figures
dc.identifierhttps://arxiv.org/abs/0901.2980
dc.identifierhttp://arxiv.org/abs/0901.2980
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/216672
dc.subjectMaterials Science
dc.titleNonvolatile SRAM architecture using MOSFET-based spin-transistors
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