Understanding photonic quantum-logic gates: The road to fault tolerance

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dc.creatorWeinhold, Till J.
dc.creatorGilchrist, Alexei
dc.creatorResch, Kevin J.
dc.creatorDoherty, Andrew C.
dc.creatorO'Brien, Jeremy L.
dc.creatorPryde, Geoffrey J.
dc.creatorWhite, Andrew G.
dc.date2008-08-06
dc.date.accessioned2026-07-07T09:54:59Z
dc.date.available2026-07-07T09:54:59Z
dc.descriptionFault-tolerant quantum computing requires gates which function correctly despite the presence of errors, and are scalable if the error probability-per-gate is below a threshold value. To date, no method has been described for calculating this probability from measurements on a gate. Here we introduce a technique enabling quantitative benchmarking of quantum-logic gates against fault-tolerance thresholds for any architecture. We demonstrate our technique experimentally using a photonic entangling-gate. The relationship between experimental errors and their quantum logic effect is non-trivial: revealing this relationship requires a comprehensive theoretical model of the quantum-logic gate. We show the first such model for any architecture, and find multi-photon emission--a small effect previously regarded as secondary to mode-mismatch--to be the dominant source of logic error. We show that reducing this will move photonic quantum computing to within striking distance of fault-tolerance.
dc.descriptionArticle (6 pages, 4 figures, 1 table) + Supplementary material (3 pages, 1 table)
dc.identifierhttps://arxiv.org/abs/0808.0794
dc.identifierhttp://arxiv.org/abs/0808.0794
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/166523
dc.subjectQuantum Physics
dc.titleUnderstanding photonic quantum-logic gates: The road to fault tolerance
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