High Q-factor CMOS-MEMS inductor
| dc.creator | Dai, Ching-Liang | |
| dc.creator | Hong, Jin-Yu | |
| dc.creator | Liu, Mao-Chen | |
| dc.date | 2008-05-07 | |
| dc.date.accessioned | 2026-07-07T12:18:44Z | |
| dc.date.available | 2026-07-07T12:18:44Z | |
| dc.description | This study investigates a high Q-factor spiral inductor fabricated by the CMOS (complementary metal oxide semiconductor) process and a post-process. The spiral inductor is manufactured on silicon substrate using the 0.35 micrometers CMOS process. In order to reduce the substrate loss and enhance the Q-factor of the inductor, silicon substrate under the inductor is removed using a post-process. The post-process uses RIE (reactive ion etching) to etch the sacrificial layer of silicon dioxide, and then TMAH (tetra methyl ammonium hydroxide) is employed to remove the underlying silicon substrate and obtain the suspended spiral inductor. The advantage of the post process is compatible with the CMOS process. The Agilent 8510C network analyzer and a Cascade probe station are used to measure the performances of the spiral inductor. Experiments indicate that the spiral inductor has a Q-factor of 15 at 11 GHz, an inductance of 4 nH at 25.5 GHz and a self-resonance frequency of about 27 GHz. | |
| dc.description | Submitted on behalf of EDA Publishing Association (http://irevues.inist.fr/handle/2042/16838) | |
| dc.identifier | https://arxiv.org/abs/0805.0915 | |
| dc.identifier | http://arxiv.org/abs/0805.0915 | |
| dc.identifier | Dans Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS - DTIP 2008, Nice : France (2008) | |
| dc.identifier.uri | http://salesiana.dossiersoluciones.com/handle/123456789/212513 | |
| dc.subject | Other Computer Science | |
| dc.title | High Q-factor CMOS-MEMS inductor | |
| dc.type | text |