Analyzing capacitance-voltage measurements of vertical wrapped-gated nanowires

dc.creatorKarlström, O.
dc.creatorWacker, A.
dc.creatorNilsson, K.
dc.creatorAstromskas, G.
dc.creatorRoddaro, S.
dc.creatorSamuelson, L.
dc.creatorWernersson, L. -E.
dc.date2008-08-21
dc.date.accessioned2026-07-07T10:04:14Z
dc.date.available2026-07-07T10:04:14Z
dc.descriptionThe capacitance of arrays of vertical wrapped-gate InAs nanowires are analyzed. With the help of a Poisson-Schr"odinger solver, information about the doping density can be obtained directly. Further features in the measured capacitance-voltage characteristics can be attributed to the presence of surface states as well as the coexistence of electrons and holes in the wire. For both scenarios, quantitative estimates are provided. It is furthermore shown that the difference between the actual capacitance and the geometrical limit is quite large, and depends strongly on the nanowire material.
dc.description15 pages, 6 Figures included, to appear in Nanotechnology
dc.identifierhttps://arxiv.org/abs/0808.2924
dc.identifierhttp://arxiv.org/abs/0808.2924
dc.identifierNanotechnology 19, 435201 (2008)
dc.identifierdoi:10.1088/0957-4484/19/43/435201
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/169593
dc.subjectOther Condensed Matter
dc.titleAnalyzing capacitance-voltage measurements of vertical wrapped-gated nanowires
dc.typetext

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