On Transformations of Load-Store Maurer Instruction Set Architecture
| dc.creator | Hou, Tie | |
| dc.date | 2008-08-19 | |
| dc.date | 2009-01-20 | |
| dc.date.accessioned | 2026-07-07T12:31:22Z | |
| dc.date.available | 2026-07-07T12:31:22Z | |
| dc.description | In this paper, we study how certain conditions can affect the transformations on the states of the memory of a strict load-store Maurer ISA, when half of the data memory serves as the part of the operating unit. | |
| dc.description | 14 pages, 6 figures; Corrected way of citing references | |
| dc.identifier | https://arxiv.org/abs/0808.2584 | |
| dc.identifier | http://arxiv.org/abs/0808.2584 | |
| dc.identifier.uri | http://salesiana.dossiersoluciones.com/handle/123456789/216424 | |
| dc.subject | Hardware Architecture | |
| dc.title | On Transformations of Load-Store Maurer Instruction Set Architecture | |
| dc.type | text |