A Self-Reconfigurable Computing Platform Hardware Architecture

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dc.creatorWeisensee, Andreas
dc.creatorNathan, Darran
dc.date2004-11-20
dc.date.accessioned2026-07-07T03:22:04Z
dc.date.available2026-07-07T03:22:04Z
dc.descriptionField Programmable Gate Arrays (FPGAs) have recently been increasingly used for highly-parallel processing of compute intensive tasks. This paper introduces an FPGA hardware platform architecture that is PC-based, allows for fast reconfiguration over the PCI bus, and retains a simple physical hardware design. The design considerations are first discussed, then the resulting system architecture designed is illustrated. Finally, experimental results on the FPGA resources utilized for this design are presented.
dc.description5 pages, 6 figures
dc.identifierhttps://arxiv.org/abs/cs/0411075
dc.identifierhttp://arxiv.org/abs/cs/0411075
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/32451
dc.subjectHardware Architecture
dc.subjectDistributed, Parallel, and Cluster Computing
dc.titleA Self-Reconfigurable Computing Platform Hardware Architecture
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