F1 - An Eight Channel Time-to-Digital Converter Chip for High Rate Experiments

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dc.creatorBraun, G.
dc.creatorFischer, H.
dc.creatorFranz, J.
dc.creatorGrunemaier, A.
dc.creatorHeinsius, F. H.
dc.creatorHennig, L.
dc.creatorKonigsmann, K.
dc.creatorNiebuhr, M.
dc.creatorSchierloh, M.
dc.creatorSchmidt, T.
dc.creatorSchmitt, H.
dc.creatorUrban, H. J.
dc.date1999-11-06
dc.date.accessioned2026-07-07T03:38:10Z
dc.date.available2026-07-07T03:38:10Z
dc.descriptionA new TDC chip has been developed for the COMPASS experiment at CERN. The resulting ASIC offers an unprecedented degree of flexibility and functionality. Its capability to handle highest hit and trigger input rates as well as its low power consumption makes it an ideal tool for future collider and fixed target experiments. First front-end boards equipped with the F1 chip have been used recently at testbeam experiments at CERN. A functional description and specification for this new TDC chip is presented.
dc.description5 pages, 5 figures
dc.identifierhttps://arxiv.org/abs/hep-ex/9911009
dc.identifierhttp://arxiv.org/abs/hep-ex/9911009
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/38415
dc.subjectHigh Energy Physics - Experiment
dc.titleF1 - An Eight Channel Time-to-Digital Converter Chip for High Rate Experiments
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