Logic Column 12: Logical Verification and Equational Verification

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dc.creatorPucella, Riccardo
dc.date2005-05-10
dc.date.accessioned2026-07-07T03:22:58Z
dc.date.available2026-07-07T03:22:58Z
dc.descriptionThis article examines two approaches to verification, one based on using a logic for expressing properties of a system, and one based on showing the system equivalent to a simpler system that obviously has whatever property is of interest. Using examples such as process calculi and regular programs, the relationship between these two approaches is explored.
dc.description11 pages
dc.identifierhttps://arxiv.org/abs/cs/0505024
dc.identifierhttp://arxiv.org/abs/cs/0505024
dc.identifierSIGACT News, 36(2), pp. 77-88, 2005
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/32763
dc.subjectLogic in Computer Science
dc.subjectF.4.1; F.3.1
dc.titleLogic Column 12: Logical Verification and Equational Verification
dc.typetext

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