Parametric Yield Analysis of Mems via Statistical Methods
| dc.creator | Vudathu, S. -P. | |
| dc.creator | Duganapalli, K. -K. | |
| dc.creator | Laur, Rainer | |
| dc.creator | Kubalinska, D. | |
| dc.creator | Bunse-Gerstner, A. | |
| dc.date | 2007-11-21 | |
| dc.date.accessioned | 2026-07-07T08:45:36Z | |
| dc.date.available | 2026-07-07T08:45:36Z | |
| dc.description | This paper considers a developing theory on the effects of inevitable process variations during the fabrication of MEMS and other microsystems. The effects on the performance and design yield of the microsystems devices are analyzed and presented. A novel methodology in the design cycle of MEMS and other microsystems is briefly introduced. This paper describes the initial steps of this methodology that is aimed at counteracting the parametric variations in the product cycle of microsystems. It is based on a concept of worst-case analysis that has proven successful in the parent IC technology. Issues ranging from the level of abstraction of the microsystem models to the availability of such models are addressed | |
| dc.description | Submitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions) | |
| dc.identifier | https://arxiv.org/abs/0711.3287 | |
| dc.identifier | http://arxiv.org/abs/0711.3287 | |
| dc.identifier | Dans Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS - DTIP 2006, Stresa, Lago Maggiore : Italie (2006) | |
| dc.identifier.uri | http://salesiana.dossiersoluciones.com/handle/123456789/143011 | |
| dc.subject | Other Computer Science | |
| dc.title | Parametric Yield Analysis of Mems via Statistical Methods | |
| dc.type | text |