Thermal measurement and modeling of multi-die packages

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dc.creatorPoppe, A.
dc.creatorZhang, Y.
dc.creatorWilson, J.
dc.creatorFarkas, G.
dc.creatorSzabo, P.
dc.creatorParry, J.
dc.date2007-09-12
dc.date.accessioned2026-07-07T08:29:04Z
dc.date.available2026-07-07T08:29:04Z
dc.descriptionThermal measurement and modeling of multi-die packages became a hot topic recently in different fields like RAM chip packaging or LEDs / LED assemblies, resulting in vertical (stacked) and lateral arrangement. In our present study we show results for a mixed arrangement: an opto-coupler device has been investigated with 4 chips in lateral as well as vertical arrangement. In this paper we give an overview of measurement and modeling techniques and results for stacked and MCM structures, describe our present measurement results together with our structure function based methodology of validating the detailed model of the package being studied. Also, we show how to derive junction-to-pin thermal resistances with a technique using structure functions.
dc.descriptionSubmitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions)
dc.identifierhttps://arxiv.org/abs/0709.1814
dc.identifierhttp://arxiv.org/abs/0709.1814
dc.identifierDans Proceedings of 12th International Workshop on Thermal investigations of ICs - THERMINIC 2006, Nice : France (2006)
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/137835
dc.subjectMaterials Science
dc.titleThermal measurement and modeling of multi-die packages
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