Holding Dissapearance in RTD-based Quantizers

dc.creatorNunez, J.
dc.creatorQuintana, J. -M.
dc.creatorAvedillo, M. -J.
dc.date2007-08-10
dc.date.accessioned2026-07-07T08:23:07Z
dc.date.available2026-07-07T08:23:07Z
dc.descriptionMultiple-valued Logic (MVL) circuits are one of the most attractive applications of the Monostable-to-Multistable transition Logic (MML), and they are on the basis of advanced circuits for communications. The operation of such quantizer has two steps : sampling and holding. Once the quantizer samples the signal, it must maintain the sampled value even if the input changes. However, holding property is not inherent to MML circuit topologies. This paper analyses the case of an MML ternary inverter used as a quantizer, and determines the relations that circuit representative parameters must verify to avoid this malfunction.
dc.descriptionSubmitted on behalf of TIMA Editions (http://irevues.inist.fr/tima-editions)
dc.identifierhttps://arxiv.org/abs/0708.1452
dc.identifierhttp://arxiv.org/abs/0708.1452
dc.identifierDans European Nano Systems Worshop - ENS 2006, Paris : France (2006)
dc.identifier.urihttp://salesiana.dossiersoluciones.com/handle/123456789/135883
dc.subjectMaterials Science
dc.titleHolding Dissapearance in RTD-based Quantizers
dc.typetext

Files

Collections