2026-07-072026-07-07http://salesiana.dossiersoluciones.com/handle/123456789/32632The necessity to secure the communication between hardware components in embedded systems becomes increasingly important with regard to the secrecy of data and particularly its commercial use. We suggest a low-cost (i.e. small logic-area) solution for flexible security levels and short key lifetimes. The basis is an approach for symmetric key exchange using the synchronisation of Tree Parity Machines. Fast successive key generation enables a key exchange within a few milliseconds, given realistic communication channels with a limited bandwidth. For demonstration we evaluate characteristics of a standard-cell ASIC design realisation as IP-core in 0.18-micrometer CMOS-technology.Cryptography and SecurityHardware ArchitectureK.4.4.f; K.6.5.a; B.7.1.b; C.3.h; J.9.dTree Parity Machine Rekeying Architecturestext