2026-07-072026-07-07http://salesiana.dossiersoluciones.com/handle/123456789/155546The new vision presented is aimed to overcome the logic overhead issues that previous works exhibit when applying GALS techniques to programmable logic devices. The proposed new view relies in a 2-phase, bundled data parity based protocol for data transfer and clock generation tasks. The ability of the introduced methodology for smart real-time delay selection allows the implementation of a variety of new methodologies for electromagnetic interference mitigation and device environment changes adaptation.English version of the paper presented in the Spanish Workshop on Reconfigurable Computing and Applications, Zaragoza (2007)Hardware ArchitectureB.6.1; B.7.1text