InAs Nanowire MOS Capacitors

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We present a capacitance-voltage study for arrays of vertical InAs nanowires. MOS capacitors are obtained by insulating the nanowires with a conformal 10nm HfO2 layer and using a top Cr/Au metallization as one of the capacitor's electrodes. The described fabrication and characterization technique enables a systematic investigation of the carrier density in the nanowires as well as of the quality of the MOS interface.
8 pages, 3 figures

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Materials Science, Other Condensed Matter

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http://salesiana.dossiersoluciones.com/handle/123456789/167340

Consulte el texto completo en el siguiente enlace:

https://arxiv.org/abs/0806.2942
 http://arxiv.org/abs/0806.2942
 Appl. Phys. Lett. 92, 253509 (2008)

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arXiv