The BlueGene/L Supercomputer

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The architecture of the BlueGene/L massively parallel supercomputer is described. Each computing node consists of a single compute ASIC plus 256 MB of external memory. The compute ASIC integrates two 700 MHz PowerPC 440 integer CPU cores, two 2.8 Gflops floating point units, 4 MB of embedded DRAM as cache, a memory controller for external memory, six 1.4 Gbit/s bi-directional ports for a 3-dimensional torus network connection, three 2.8 Gbit/s bi-directional ports for connecting to a global tree network and a Gigabit Ethernet for I/O. 65,536 of such nodes are connected into a 3-d torus with a geometry of 32x32x64. The total peak performance of the system is 360 Teraflops and the total amount of memory is 16 TeraBytes.
Lattice2002(Plenary) proceedings, LaTeX, 8 pages 8 figures

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High Energy Physics - Lattice

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http://salesiana.dossiersoluciones.com/handle/123456789/38725

Consulte el texto completo en el siguiente enlace:

https://arxiv.org/abs/hep-lat/0212030
 http://arxiv.org/abs/hep-lat/0212030

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arXiv